Description

• Responsibility for several Analog ASIC projects of different complexity from design start to manufacturing including packaging and support for validation in test chips and final implementation.
• Defines and executes operational plans and monitors performance to plan to ensure the timely achievement of project objectives and according to the project life cycle.
• Collaborate cross-functionally and maintains linkage to Chip Top-Level-, HW-, SW- and Maintenance engineering teams
• Work with design suppliers and ensure they deliver towards scope and schedule requirements
• Leads and manages a team of 8 engineers dedicated to meeting technical goals and schedule and quality commitments.
• Develops and grows individuals and the team
• Lead by example to establish an open and transparent work environment with a strong feedback culture and the aim for continuous improvement

• University degree in Electrical Engineering, Diploma or MS EE with strong background in Analog design
• Strong know how in analog ASIC design methodologies, devices, and tools
• Proven track record of experience in ASIC design, cross functional alignment, basic project management and project management tools in the ASIC environment across functions.
• Know how in Fin-FET technologies
• Basic knowledge about Linux* environment and using programming languages
• Strong team working and problem-solving skills, superior communication skills (cross-functional, internal/external, cross-cultural) across hierarchy levels
• Strong coordination skills, ability to lead and influence x-functional teams
• Strong self-management, sets proper priorities
• Fluent English language skills (German language skills would be an added advantage)